Nr

Name

Country

Reports, Publication or communication titles

Peer review

1

Rusiecki Andrzej 

PL

• Neural Network Approach to Modelling Parameters Variation in the Frequency Domain, Technical report, LMN, Pol. Univ. Bucharest, Jan 2007,

• D1.2c - Compact parametric models for passive integrated components EM coupled with environment, Technical report, LMN, Pol. Univ. Bucharest, Jan 2007,

• Neural Network Approach to Modelling Parameters Variation in the Frequency Domain, ATEE Advanced Topics in Electrical Engineering,  LMN workshop, 3-5 June 2007, Bucharest Romania

No

No

Yes

2

Serkan Mit 

TR

• Migration of ROM Workbench to the Comson Demo Platform. ATEE Advanced Topics in Electrical Engineering, LMN workshop, 3-5 June 2007, Bucharest Romania

No

3

Francisco Hugo Alvarez Garcia

ES

• Simulation of Electro-mechanic micro-systems in Matlab. ATEE Advanced Topics in Electrical Engineering,  10-11 Nov 2006, Bucharest Romania

No

4

Alberto Ascia

IT

• Theoretical Evaluation of the Natural Convection Coefficient for the Helmholtz coils system, Technical report, LMN, Pol. Univ. Bucharest, 25-09-2007

No

5

Kandula Hanumantha Rao

IN

• Fast linear solvers for simulation of nanoelectronic structures, Technical report, LMN, Pol. Univ. Bucharest, Jan 2008

• Evaluation of solvers for sparse complex linear systems of equations, arising from the modeling of passive on-chip components

No

6

Durga Kishor Kumar Bandi

IN

• Fast linear solvers for simulation of nanoelectronic structures, Technical report, LMN, Pol. Univ. Bucharest, Jan 2008

No

7

Zaheer Khan

PK

• Performance of Polyphase Sequences for uplink CDMA system using multiuser detection techniques, Submited to International Symposium on Electronics and Telecommunications (ETC'2008), Timisoara, Romania, September 25-26,  2008,

• Peak-to-Average Power Ratio or Crest Factor Analysis of UCHT Complex Sequences for Multi-carrier CDMA Systems," published in proceedings of SPWC2007 conference in London, June 2007.

• Analysis of Uplink Quasi-Synchronous CDMA System Using Orthogonal Polyphase Sequences," published in proceedings of IEEE WOCN2007 conference in Singapore, July 2007.

• Cooperation and Coordination in Hierarchical Cognitive Radio Networks with Turn-Taking and Under the Impact of Cluster Norms and Dismissals," (submitted to IEEE Trans. on Communication).

• Polyphase Sequences for Uplink CDMA System Using Multiuser Detection. Submitted to SPECTS 2008,  International Symposium on Performance Evaluation of Computer and Telecommunication Systems

http://atc.udg.edu/SPECTS2008/

16-18, 2008 Edinburgh, UK

Yes

8

Plata Jagoda Anna

PL

   Verification of preordering numerical methods for reduction of fill-ins number

in LU decomposition, Invited paper to

THE FOURTH INTERNATIONAL

CONFERENCE "INVERSE

PROBLEMS: MODELING &

SIMULATION"

(http://www.ipms-conference.org),

May 27-30, Lykia , Turkey

J. Plata, M. Dobrzynski, S. Gim, Sensitivity analysis of on-chip passive integrated structures to environmental variation using parametric compact models , in Proc. of 13^th Biennial IEEE Conference on Electromagnetic Field Computation, CEFC, May 2008, Athens, Greece.

J. Plata, M. Dobrzynski, Solving methods for sparse matrices in modelling of electromagnetic effects in nano Integrated Circuits, 4^th International Conference on Inverse Problems: Modelling and Simulation, IP:M&S, May 2008, Fethiye, Turkey.

  M. Dobrzynski, J. Plata, Verification of preordering numerical methods for reduction of fill-ins number in LU decomposition; European Seminar on Coupled Problems, ESCO, June 2008, Jetrichovice, Czech Republic; BEST POSTER AWARD.

        M. Dobrzynski, J. Plata, S. Gim, Evaluation of Domain Decomposition Approach for Compact Simulation of On-Chip Coupled Problems, 7^th International Conference on Scientific Computing in Electrical Engineering, SCEE, September 2008, Helsinki, Finland.

J. Plata, M. Dobrzynski, S. Gim, Sensitivity Analysis of on-Chip Passive Structures, in Proc. of 6^th International Symposium on Advanced Topics in Electrical Engineering, ATEE, November 2008, Bucharest, Romania.

J. Plata, M. Dobrzynski, Sparse matrix preordering algorithm based on symbolic factorization,    2^nd International Conference on Finite Element Methods in Engineering and Science, FEMTEC, January 2009, Lake Tahoe, CA, USA.

J. Plata, M. Dobrzynski, S. Gim, Evaluation of Domain Decomposition Approach for Compact Simulation of On-Chip Coupled Problems, Scientific Computing in Electrical Engineering SCEE 2008, Mathematics in Industry, Springer, accepted.

M. Dobrzynski, J. Plata, Fill-ins number reducing direct solver designed for FIT-type matrix, Mathematics and Computers in Simulation, IMACS 2009 Elsevier. Math. Comput. Simul.
(2009), doi:10.1016/j.matcom.2009.05.001

Yes

9

Dobrzynski Michal Karol

PL

• Verification of preordering numerical methods for reduction of fill-ins number in LU decomposition. Invited paper at THE FOURTH INTERNATIONAL CONFERENCE "INVERSE PROBLEMS: MODELING & SIMULATION" (http://www.ipms-conference.org), May 27-30, Lykia , Turkey

J. Plata, M. Dobrzynski, S. Gim, Sensitivity analysis of on-chip passive integrated structures to environmental variation using parametric compact models, in Proc. of 13^th Biennial IEEE Conference on Electromagnetic Field Computation, CEFC, May 2008, Athens, Greece.

J. Plata, M. Dobrzynski, Solving methods for sparse matrices in modelling of electromagnetic effects in nano Integrated Circuits, 4^th International Conference on Inverse Problems: Modelling and Simulation, IP:M&S, May 2008, Fethiye, Turkey.

M. Dobrzynski, J. Plata, Verification of preordering numerical methods for reduction of fill-ins number in LU decomposition, European Seminar on Coupled Problems, ESCO, June 2008, Jetrichovice, Czech Republic; BEST POSTER AWARD.

M. Dobrzynski, J. Plata, S. Gim, Evaluation of Domain Decomposition Approach for Compact Simulation of On-Chip Coupled Problems, 7^th International Conference on Scientific Computing in Electrical Engineering, SCEE, September 2008, Helsinki, Finland.

J. Plata, M. Dobrzynski, S. Gim, Sensitivity Analysis of on-Chip Passive Structures, in Proc. of 6^th International Symposium on Advanced Topics in Electrical Engineering, ATEE, November 2008, Bucharest, Romania.

• J. Plata, M. Dobrzynski, Sparse matrix preordering algorithm based on symbolic factorization,    2^nd International Conference on Finite Element Methods in Engineering and Science, FEMTEC, January 2009, Lake Tahoe, CA, USA.

J. Plata, M. Dobrzynski, S. Gim, Evaluation of Domain Decomposition Approach for Compact Simulation of On-Chip Coupled Problems, Scientific Computing in Electrical Engineering SCEE 2008, Mathematics in Industry, Springer, accepted.

M. Dobrzynski, J. Plata, Fill-ins number reducing direct solver designed for FIT-type matrix, Mathematics and Computers in Simulation, Elsevier, submitted.

Yes

10

Mamadou BAH

GE

• Modeling and Simulation of The Transistor BFG425W NPN WideBand, The Second International Symposium on Electrical and Electronics Engineering ISEEE-2008, Galati, Romania

• Modeling and Simulation of BFG425W NPN Transistor

Technical report, LMN, Pol. Univ. Bucharest,  2008

• Half-wave Antenna Modeling

Technical report, LMN, Pol. Univ. Bucharest,  2008

• Electromagnetic Waves Modeling

Technical report, LMN, Pol. Univ. Bucharest,  2008

Yes

No

No

No

11

Zhifeng Sheng

China

• A novel discretization scheme and computational method to handle high contrast in computational electromagnetic problems (Part of PhD thesis)

No

12

Semih Ozel

TR

• A model for magnetic actuation of the artificial multicilia

• Nanotechnology in Education: Nanoeducation

• State in the art of Atomic Force Microscope (AFM)

Technical report, LMN, Pol. Univ. Bucharest,  2008

Yes

Yes

No

13

G. R. M. Vasquez,

NL

• Topology optimization of planar Integrated Lichtwave circuits. Optimization through Evolvable Hardware

Technical report, LMN, Pol. Univ. Bucharest,  2008,

Topology optimization of planar Integrated PUB, section of PhD thesis, 2009

No

No

14

Radomir Ivanov Panayotov,

BG

• The CoMSON Demonstrator Platform Goals, Structure and Algorithms

Technical report, LMN, Pol. Univ. Bucharest,  2008

No

15

Adnan Muhammad

PK

• Use of UNICORE in Grid Computing

Technical report, LMN, Pol. Univ. Bucharest,  2008

No

16

Jamal Tauseef

PK

• Results from Feature Clustering

Technical report, LMN, Pol. Univ. Bucharest,  2008

• Working with Unicore 6.x

Technical report, LMN, Pol. Univ. Bucharest,  2008

No

No

17

Getachew Abebe Faris

ET

• SOI MOSFET - Simulated Results and Discussion

Technical report, LMN, Pol. Univ. Bucharest,  2008

No

18

Margarita L. Todorova

BG

Risk analysis of hazardous substances transport, PUB 2009, PhD report

No

19

Radomir Ivanov Panayotov

BG

• Network and Semiconductor Device Modeling, PUB 2009, PhD report

No

20

Bogdan Bogdanov

BG

• Scheduling algorithms for desktop grid platforms, PUB 2009, PhD report

No

21

Todor Nikolov

BG

• Trends in Distributed Applications and Problem-Solving Environments, PUB 2009, PhD report

No

22

Stefan Val. Stefanov

BG

• RF Broadband Amplifiers in CMOS Technology, PUB 2009, PhD report

No